Cadence Design Systems Allegro CL Success Story

This case study details the implementation of Allegro CL by Cadence Design Systems for their Design Planner Tool Suite, which is utilized for ASIC floor-planning design. The document outlines how Allegro CL's ANSI-standard Common Lisp enables dynamic behavior and on-demand customization, allowing Cadence to adapt their software to meet customer needs effectively. The Design Planner suite consists of three products: Top-Down DP, Logic DP, and Physical DP, each contributing to the creation of an integrated circuit floor plan. Top-Down DP initiates the design process by estimating interconnect delays early in the design phase. Logic DP provides accurate estimates of performance through advanced algorithms, while Physical DP finalizes the circuit routing, ensuring that interconnect delays are continuously refined. The case study emphasizes the importance of the DP approach in managing complex designs and highlights the advantages of using Allegro CL for customization and tool flow management.