Automated High-Speed Interface Routing in Multi-Die Designs

This white paper discusses the challenges and solutions related to high-speed die-to-die interconnects in multi-die designs, emphasizing the importance of advanced routing methodologies. It outlines the critical role of interconnectivity planning and die-to-die signal routing, particularly in the context of High-Bandwidth Memory (HBM) and Universal Chiplet Interconnect Express (UCIe) standards. The document details the complexities involved in routing, including issues such as severe routing congestion, limited routing space, and the need for compliance with design rule checks. It presents the necessity for automation in routing implementation to enhance scalability and design accuracy. The paper further describes a specialized automatic router that supports HBM and UCIe, detailing its capabilities in managing routing constraints and optimizing signal integrity. By integrating channel analysis early in the design process, designers can improve routing strategies and overall system performance, addressing the growing complexity of multi-die designs.