Multi-Core Processors Compliance with CAST-32A and AMC 20-193

This technical report discusses the challenges and solutions associated with the compliance of multi-core processors (MCPs) with CAST-32A and AMC 20-193 standards in safety-critical applications. It outlines the inherent difficulties in scheduling tasks across multiple processor cores and the potential for hardware interference, which can lead to unsafe conditions. The document emphasizes the importance of demonstrating compliance with DO-178C through effective scheduling and resource management strategies. It details the role of PikeOS, an RTOS that supports MCPs, in achieving compliance by providing robust partitioning and resource management capabilities. The report also addresses specific issues such as cache contention, memory overload, and interrupt management, offering mitigation strategies to enhance system safety and performance. Additionally, it highlights the LDRA tool suite's capabilities for ensuring traceability and compliance with regulatory standards, thereby aiding developers in meeting the stringent requirements for civil aviation software.