Auto Re-vectorization Methodology and Performance Analysis

This whitepaper presents a methodology for auto re-vectorization of intrinsic code from various vector instruction set architectures (ISAs) to RISC-V Vector assembly. The objective is to optimize workloads by minimizing latency, maximizing throughput, reducing memory footprint, and lowering power consumption. The process involves converting input intrinsic code to LLVM Vector IR, modifying ISA attributes to align with RISC-V specifications, and applying LLVM optimization passes. The paper details the steps for converting x86 AVX intrinsic code to RISC-V Vector code, including commands for compiling and optimizing the code. Performance metrics are analyzed using the llvm-mca tool, which measures instruction timing and throughput. Results indicate that the auto re-vectorization tool significantly outperforms traditional auto-vectorization methods, demonstrating over 1.7 times better performance in a matrix multiplication kernel comparison. The paper also discusses the limitations of alternative approaches and emphasizes the advantages of leveraging LLVM infrastructure for optimization.