Auto Re-vectorization Methodology and Performance Analysis

This whitepaper presents a methodology for auto-revectorization, which systematically transforms vector/SIMD intrinsic code from architectures such as x86 AVX and ARM Neon into RISC-V Vector assembly. The process begins with converting the input intrinsic code to LLVM Vector IR, followed by modifying the attributes to align with RISC-V specifications. Subsequently, LLVM optimization passes are applied to enhance performance before generating the final RISC-V Vector assembly code. The paper details the performance comparison of a matrix multiplication kernel, demonstrating that the auto-revectorization tool significantly outperforms traditional auto-vectorization methods. The results indicate that the tool achieves more than 1.7 times better performance than the reference C code auto-vectorized to RISC-V Vector. The authors also discuss the limitations of alternative approaches that rely on header replacements and highlight the advantages of leveraging LLVM infrastructure for optimization. This comprehensive approach aims to facilitate the efficient use of RISC-V architecture in various computational applications.