Fast End-to-End Performance Simulation of Hardware-Software Stacks

This document is a research article that presents a novel approach to simulating the end-to-end performance of accelerated hardware-software stacks. The authors identify the challenges faced by developers due to the slow nature of full-stack simulations, which can take hours to simulate just one second of real execution. To address this issue, they propose a minimalist simulation design that significantly speeds up the process while maintaining accuracy. The approach involves simulating only the unavailable components of the system and running the rest natively, thus enabling interactive development of accelerated stacks. The paper details the implementation of two key components: a native-execution orchestrator (NEX) and an accelerator di-simulator (DSim). The results demonstrate that this method achieves speedups ranging from 6× to 879× compared to existing solutions, with high accuracy in simulated time. The findings suggest that this new simulation method can facilitate quicker iterations in the development of hardware-accelerated systems.